Salah Nasri is the CEO & Co-Founder of the International Semiconductor Executive Summits (ISES), a division of the International Semiconductor Industry Group Ltd. an influential organization within the semiconductor industry. With extensive experience in the sector, Nasri has played a pivotal role in fostering global collaboration among semiconductor leaders. Under his leadership, ISES has become a premier platform for industry executives to connect, share insights, and drive innovation across various regions including the United States, Europe, Asia, and the Middle East.

Salah Nasri has been instrumental in expanding the reach and impact of ISES, organizing significant events that bring together decision-makers from across the semiconductor ecosystem. These events provide opportunities for networking, collaboration, and the exchange of ideas crucial for advancing the industry in areas such as semiconductor manufacturing, MEMS, AI, automotive electronics, and more.

His leadership has not only enhanced the visibility of ISES globally but also strengthened partnerships with key industry players, ensuring that ISES remains at the forefront of semiconductor innovation and development. Salah Nasri has previously worked at Goldman Sachs’s, Credit Suisse and International Business Development Group. Salah Nasri graduated from Oxford University and Loughborough University in International Relations and Economics. In 2024, Salah Nasri became a Stanford University Alumni after completing the Stanford Executive Program.

Director, IT Industry Division, Commerce and Information Policy Bureau, METI(Ministry of Economy, Trade and Industry)

1998 Joined the Ministry of International Trade and Industry (MITI)

2007 Visiting Scholar, Stanford University

2008 MBA from EDHEC Business School, France

2009 Industrial Revitalization Division

2011 Policy Planning and Coordination Division, Minister’s Secretariat

2014 Japan Economic Revitalization Bureau, Cabinet Secretariat

2016 Deputy Director, JETRO Los Angeles Office,

Director, Industry Creation Policy Division, Principal Director, IT Industry and Digital Economic Security, etc

2021 Counselor for Information Industry and Digital Economy and Security, Minister’s Secretariat

July 1, 2022 Current Position

Dr Hamid Azimi, formerly Corporate VP, Director of Substrate Packaging TD of Intel. He was responsible for advanced substrate packaging for all Intel logic products across substrate suppliers’ factories, as well as the company’s two internal substrate R&D factories. These R&D factories are the birthplace of panel level die embedding technology and play a crucial role for enabling EMIB, the key technology to Intel’s data-centric business and heterogenous packaging. His team works with equipment, material, chemical and substrate suppliers to develop Si-fab backend-like technologies for panel level advanced packaging, and transfer technologies to Intel supplier factories to meet the demand of future Intel products.

Education: Osaka Univ. Osaka, Japan Bachelor 1986

Graduate School of Osaka Univ. Osaka, Japan PhD 2012

Dr. Yasumitsu Orii joined IBM Japan in 1986 and was a leading expert on Flip Chip organic packages, which had contributed to the performance improvements and miniaturization of such products as servers, laptop computers, and HDDs. The packaging technology is becoming more important for next generation server products as Moore’s Law reaches its limits. His flip chip expertise extended into many related areas. Initially, he was a pioneer of flip chip on FPC (Flexible Printed Circuit) for HDDs, which allowed the read/write amplifier ICs to be mounted on the suspension and much closer to the GMR head. Later, he developed the C2 (Chip Connection) technology that supported low-cost 50-μm-pitch flip chip bonding for the commodity consumer electronics market and it was licensed to a company in Taiwan. At IBM Research Tokyo, he was leading the next generation flip chip organic package, 3D-IC projects and Neuromorphic Computing for IBM Servers and creating new technologies under a Joint Development Program involving many leading Japanese materials companies. He left IBM in 2014 and joined NAGASE & CO., LTD. He established “New Value Creation Office” under the direct control of the president and launched the material informatics software as a service in 2020. He left NAGASE and he joined Rapidus Corporation in 2022/Dec. Now he is the senior managing executive officer to lead the 3D Assembly Division.

Kathy Yan, currently Director of New Technology & System Integration, Advance Packaging and Test at TSMC. She is now in charge of new CoWoS-R organic interposer technology RD development for high speed HPC application, advanced packaging mechanical and thermal simulation & validation. She has been also managing new product co-development projects for system customers, across multiple packaging architecture including InFO POP, InFO-SOW, CoWoS-S and CoWoS-R. In addition She is the key player in TSMC 3D Fabric Alliance as the Memory Eco-system program owner. Prior to joining TSMC, she spend most of her career at Intel Advanced packaging RD and Medtronic technology Center in Arizona, US. She has a PhD in Electrical Engineering and Master in Material Science from Auburn University.

Deepak Kulkarni is a Fellow, Advanced Packaging at AMD. Deepak has over 15 years of experience in packaging technology development. Over the years, he has held several leadership positions driving substrate technology development and yield improvement. Prior to joining AMD, Deepak was Senior Director of packaging yield at Intel Corporation. He holds 17 patents and nineteen publications on various aspects of packaging such as 2.5D/3D architectures, DFM/DFY and AI techniques applied to yield management. His contributions to the semiconductor industry have been recognized by an Intel Achievement Award, Next 5% award (AMD) and best paper award (ITHERM). Deepak holds a PhD from the University of Illinois Urbana-Champaign with a major in mechanical engineering and a minor in computational science.

Toshihito Tsuga is General Manager of the Regional Account Division. He joined Onto Innovation Japan (Nanometrics Japan) in 2019 as Sales Manager. Prior to joining Onto Innovation, he was Product Manager at KLA Japan from 2005 to 2019. Tsuga has over 30 years of experience in Semiconductor industry, including at IC device makers as process engineer at Texas Instrument Japan, Renesas Technology Inc.,. Tsuga received ph. D degree from Tohoku University.

LIM Choon Khoon (CK) is a Senior Vice President and Chief Executive Officer of Semiconductor Solutions Advanced Packaging (AP).

CK’s career spans key engineering, manufacturing, and regional functional and global general management roles with several global semiconductor companies. As Chief Executive Officer of the Segment’s AP Business Group, he helps provide the industry’s leading first-level interconnect technologies covering leading AP First Level Interconnect (FLI) technologies for logic, HBM, Si Photonics & Co-Packaged Optics, wafer die singulation solution for advanced fabricated wafers and Panel ECD for fine Line/Space organic and glass substrate & Wafer PVD, that are well-positioned to serve and to scale with the most demanding AP needs.

CK holds a Bachelor of Science (Honours) in Production Engineering and Production Management degree from the University of Nottingham, United Kingdom

Present:

• JSMC CEO
• PSMC Japan President
• Maxram Chairman

Experienced:

• 2010　 　PSMC AVP
• 2010～2014　 Renesas SP Drivers/TW President
• 2014　 　PSMC VP
• 2020　 　PSMC Memory BU GM
• 2022　 　PSMC Japan President
• 2023　 　JSMC CEO

Axel Bialke is SVP Asia of aiMotive which is the AD/ADAS development center of Stellantis as well as CEO of Cross Border Technologies. He has a 40 year track record in Semiconductor and Automotive industry in Asia and Europe and is based in Japan. He is specialized in AI technologies, system architecture for self driving cars, recognition technologies, datasets for AD/ADAS, sensor technologies and Sensor simulation as well as semiconductors for AI applications (NPU technologies). His networks extends to all automotive OEMS, TIER1 and semiconductor company worldwide.

Dr. YOON is currently working as Corporate VP/Head of Group, PKG group, Product Technology, S.LSI, Samsung Electronics. Prior to joining Samsung, He was director of group technology strategy, STATS ChipPAC, JCET Group. He also worked deputy lab director of MMC (Microsystem, Module and Components) lab, IME (Institute of Microelectronics), A*STAR, Singapore. ”YOON” received Ph.D degree in Materials Science and Engineering from KAIST, Korea. He also holds MBA degree from Nanyang Business School, Singapore. He has over 300 journal papers, conference papers and trade journal papers, and over 20 US patents on microelectronic materials and electronic packaging. Served as technical committee member of various international packaging technology conferences, EPTC, ESTC, iMAPS, IWLPC and SEMI.

Ken Shibata has been immersed in the semiconductor industry since 1980. He initiated his career at a manufacturing company within Hitachi Semiconductor Division, where he spent the first decade as a backend assembly process engineer. Over the subsequent 10 years, he played a pivotal role in promoting the OSAT business. From 2001 to 2014, Ken contributed significantly to Amkor Technology Japan, ultimately holding the position of Representative Director and Sales VP. Following this, he served as Representative Director and Senior Vice President at UTAC Japan from November 2014 to June 2019. Ken joined ISES on October 15, 2023.

Kamel Ait Mahiout is a seasoned professional with over 30 years of experience in the electronics industry. His expertise spans from RF and Microwave engineering to executive roles in prominent companies such as Unity SC and Amkor Technology, where he significantly contributed to the growth and alignment of the businesses with key industry players.